PX5 RTOS

PX5 RTOS is smaller, faster, deterministic and certified

The RTOS of choice for professional developers

PX5 RTOS is one of the smallest RTOS, ideal for memory-constrained embedded devices:

  • The RTOS requires sub-1KB of flash memory.
  • The RTOS only needs 1KB of RAM on typical 32-bit microcontrollers.

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The RTOS delivers sub-microsecond context switching and API calls on most microprocessors for ultra-high performance.

Rich determinism makes the RTOS ideal for the most demanding real-time embedded applications.

The RTOS also enables best-in-class safety and security for your embedded applications.

  • PX5 tests the entire RTOS code base with complete C statement and branch decision coverage for every release.
  • The RTOS offers pointer/data verification (PDV) technology for unprecedented run-time function pointer, system object, buffer, and stack verification.
  • The RTOS is certified to the industry functional safety standards IEC 61508 SIL 4 (electronic), IEC 62304 Class C (medical), ISO 26262 ASIL D (automotive), and EN 50128 SW-SIL 4 (rail).

For even more safety and security, memory protection for RTOS applications is available through PX5 MODULES, which provides a lightweight infrastructure of separately built C application modules to guard execution by MPU and MMU facilities.

An API that is a native implementation of the POSIX pthreads standard enables portability with embedded Linux and other POSIX RTOSes, making the RTOS among the simplest to use. Optional extensions make this the best RTOS for deeply embedded, real-time applications.

PX5 RTOS is fifth generation and best RTOS. The list of RTOSes include ThreadX, Nucleus PLUS, and Nucleus RTX—three of the most popular RTOSes used in billions of devices worldwide.

This is the best RTOS for use with boards from AMD, GigaDevice, NXP Semiconductors, Renesas, SiFive, STMicroelectronics, and Texas Instruments.

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px5 rtos logo black

  • Small & fast RTOS
  • Fifth-generation RTOS by the author of ThreadX and Nucleus
  • Deterministic RTOS
  • Easy to use RTOS
  • Safe and secure RTOS
  • Memory protection via PX5 MODULES
  • Pre-certified RTOS to highest IEC 61508 SILs for safety
  • POSIX RTOS with native pthread API
  • Pointer/data verification (PDV)
  • Asymmetric multiprocessing (AMP)
  • Symmetric multiprocessing (SMP)
  • Cortex-M/R/A RTOS
  • Arm 64-bit RTOS
  • Renesas RX RTOS
  • RISC-V RTOS
  • IAR, GCC, Arm tools
  • Full source code
  • Royalty-free RTOS
  • Professional Support

Components of PX5 RTOS

Thread Support

• Priority-base, preemptive scheduling

• No compile-time limits on number of threads

• Optional per-thread time-slicing

• Deterministic, real-time response

• Typically < 1μs context switching, API calls

• PX5 pthreads+ extensions

o User-controlled memory allocation

o Suspend/Resume APIs

o Per-thread time-slice designations

o Named threads

• Rich set of POSIX APIs supported

o pthread_attr_destroy

o pthread_attr_getdetachstate

o pthread_attr_getstackaddr

o pthread_attr_getstacksize

o pthread_attr_init

o pthread_attr_setdetachstate

o pthread_attr_setstackaddr

o pthread_attr_setstacksize

o pthread_cancel

o pthread_cleanup_pop

o pthread_cleanup_push

o pthread_create

o pthread_detach

o pthread_equal

o pthread_exit

o pthread_join

o pthread_self

o pthread_setcancelstate

o pthread_setcanceltype

o pthread_testcancel

o sched_yield

Semaphore Support

• Thread synchronization (consumer-producer & mutual exclusion)

• No compile-time limits on number of counting semaphores

• Threads wait for semaphores in priority order

• Deterministic, real-time response

• Typically < 1μs API calls

• PX5 pthreads+ extensions

o User-controlled memory allocation

o Named semaphores

• Rich set of POSIX APIs supported

o sem_destroy

o sem_init

o sem_trywait

o sem_post

o sem_wait

o px5_sem_extend_init

o px5_semattr_getcontroladdr

o px5_semattr_getcontrolsize

o px5_semattr_getname

o px5_semattr_init

o px5_semattr_setcontroladdr

o px5_semattr_setname

Mutex Support

• Thread mutual exclusion (synchronization)

• No compile-time limits on number of mutexes

• Nested and non-nested

• Priority inheritance

• Threads wait for mutex in priority order

• Deterministic, real-time response

• Typically < 1μs API calls

• PX5 pthreads+ extensions

o User-controlled memory allocation

o Named mutexes

• Rich set of POSIX APIs supported

o pthread_mutex_destroy

o pthread_mutex_init

o pthread_mutex_lock

o pthread_mutex_trylock

o pthread_mutex_unlock

o pthread_mutexattr_destroy

o pthread_mutexattr_getprotocol

o pthread_mutexattr_getpshared

o pthread_mutexattr_gettype

o pthread_mutexattr_init

o pthread_mutexattr_setprotocol

o pthread_mutexattr_setpshared

o pthread_mutexattr_settype

Signals Support

• Thread synchronization

• Deterministic, real-time response

• Typically < 1μs API calls

• Rich set of POSIX APIs supported

o pthread_kill

o pthread_sigmask

o sigaction

o sigemptyset

o sigaddset

o sigdelset

o sigfilset

o sigismember

o sigpending

o sigtimedwait

o sigwait

o sigwaitinfo

Condition Variable Support

• Thread communication

• No compile-time limits on number of condition variables

• Threads wait for condition variables in priority order

• Deterministic, real-time response

• Typically < 1μs API calls

• PX5 pthreads+ extensions

o User-controlled memory allocation

o Named condition variables

• Rich set of POSIX APIs supported

o pthread_cond_destroy

o pthread_cond_init

o pthread_cond_broadcast

o pthread_cond_signal

o pthread_cond_timedwait

o pthread_cond_wait

o pthread_condattr_destroy

o pthread_condattr_getpshared

o pthread_condattr_init

o pthread_condattr_setpshared

POSIX message queues & timers

• Thread communication & Sleeping

• No compile-time limits on the number of message queues

• Message priority supported

• FIFO waiting on full/empty message queues

• Deterministic, real-time response

• Typically < 1μs API calls

• PX5 pthreads+ extensions

o User can optionally specify memory for message queue control block

o Named message queues

• Rich set of POSIX APIs supported

o mq_close

o mq_getattr

o mq_open

o mq_receive

o mq_send

o mq_setattr

o mq_timedreceive

o mq_timedsend

o px5_mq_extend_open

o px5_mq_extendattr_destroy

o px5_mq_extendattr_getcontroladdr

o px5_mq_extendattr_getcontrolsize

o px5_mq_extendattr_getqueueaddr

o px5_mq_extendattr_getqueuesize

o px5_mq_extnedattr_init

o px5_mq_extendattr_setcontroladdr

o px5_mq_extendattr_setqueueaddr

o nanosleep

o sleep

o usleep

PX5 RTOS pthread+ extensions

Pthread+ thread extensionsa

• Thread suspension/resumption

• User can optionally specify memory for thread control block

• Per-thread time-slicing

• Named threads

• Typically < 1μs context switching, API calls

• Extension APIs supported

o px5_pthread_attr_getcontroladdr

o px5_pthread_attr_getcontrolsize

o px5_pthread_attr_getname

o px5_pthread_attr_gettimeslice

o px5_pthread_attr_setname

o px5_pthread_attr_setcontroladdr

o px5_pthread_attr_settimeslice

o px5_pthread_name_get

o px5_pthread_resume

o px5_pthread_suspend

Pthread+ Ticktimer extensions

• Tick-based (application-defined frequency, typically 10ms)

• Free-running tick counter

• One-shot or periodic

• Fast processing - no linear searches

• Named timers

• Typically < 1μs API calls

• Extension APIs supported

o px5_pthread_tick_sleep

o px5_pthread_ticks_get

o px5_pthread_ticktimer_create

o px5_pthread_ticktimer_destroy

o px5_pthread_ticktimer_start

o px5_pthread_ticktimer_stop

o px5_pthread_ticktimer_update

o px5_pthread_ticktimerattr_destroy

o px5_pthread_ticktimerattr_getcontroladdr

o px5_pthread_ticktimerattr_getname

o px5_pthread_ticktimerattr_init

o px5_pthread_ticktimerattr_setcontroladdr

o px5_pthread_ticktimerattr_setname

PX5 Error handling extensions

• Central error handling

• Pointer/Data Verification (PDV) Technology

• Application override of error handling

Pthreads+ Events extended object

• Thread synchronization primitive

• No compile-time limits on number of public events

• Threads can suspend on any and/or combination of events

• Broadcast to all waiting threads or highest-priority waiting thread

• Deterministic, real-time response

• Typically < 1μs API calls

• User can optionally specify memory for event flags control block

• Named Events

• Typically < 1μs context switching, API calls

• Extension Events APIs supported

o px5_pthread_events_broadcast

o px5_pthread_events_clear

o px5_pthread_events_create

o px5_pthread_events_destroy

o px5_pthread_events_name_get

o px5_pthread_events_set

o px5_pthread_events_timedwait

o px5_pthread_events_wait

o px5_pthread_eventsattr_getcontroladdr

o px5_pthread_eventsattr_getcontrolsize

o px5_pthread_eventsattr_getname

o px5_pthread_eventsattr_setcontroladdr

o px5_pthread_eventsattr_setname

Pthreads+ Fast Queue extended object

• Thread communication primitive

• No compile-time limits on number of fast queues

• Threads can suspend on empty and full fast queues

• Fixed-sized message passing (size specified by application)

• Deterministic, real-time response

• Typically < 1μs API calls

• User can optionally specify memory for fast queue control block

• Named Fast Queue

• Typically < 1μs context switching, API calls

• Extension Fast Queue APIs supported

o px5_pthread_fastqueue_create

o px5_pthread_fastqueue_destroy

o px5_pthread_fastqueue_send

o px5_pthread_fastqueue_receive

o px5_pthread_fastqueue_tryreceive

o px5_pthread_fastqueue_trysend

o px5_pthread_fastqueueattr_getcontroladdr

o px5_pthread_fastqueueattr_getcontrolsize

o px5_pthread_fastqueueattr_getname

o px5_pthread_fastqueusttr_setcontroladdr

o px5_pthread_fastqueueattr_setname

Pthreads+ Memory Management extended objects

• Fixed and variable-sized memory pools

• No compile-time limits on number of memory pools

• Threads can suspend when memory is not available

• Memory given to highest-priority waiting thread

• Pool integrity verified with PDV technology

• Deterministic, real-time response

• Typically < 1μs API calls

• User can optionally specify memory for memory pool control block

• Named memory pools

• Typically < 1μs context switching, API calls

• Extension Memory Management APIs supported

o px5_pthread_memorypool_allocate

o px5_pthread_memorypool_create

o px5_pthread_memorypool_destroy

o px5_pthread_memorypool_release

o px5_pthread_memorypoolattr_getcontroladdr

o px5_pthread_memorypoolattr_getcontrolsize

o px5_pthread_memorypoolattr_getname

o px5_pthread_memorypoolattr_setcontroladdr

o px5_pthread_memorypoolattr_setname

o px5_pthread_memorypoolattr_setcontroladdr

o px5_pthread_memorypoolattr_setname

• ANSI C

• C-STAT clean

• MISRA compliant (with some exceptions)

• 100% Statement Coverage

• 100% Branch/Decision Coverage

• Full Source Provided with License

• Provides all the low-level processor/tool-specific logic

• Simple, typically contains 10-15 small assembly functions

• Easy to support new processor/tools

• Existing support for these architectures:

o Arm Cortex-M: Cortex-M0, Cortex-M0+, Cortex-M3, Cortex-M4, Cortex-M7, Cortex-M23, Cortex-M33, Cortex-M35P, Cortex-M52, Cortex-M55, Cortex-M85

o Arm Cortex-R: Cortex-R5, Cortex-R8, Cortex-R52, Cortex-R52+, Cortex-R82

o Arm Cortex-A: Cortex-A5, Cortex-A7, Cortex-A32, Cortex-A34, Cortex-A35, Cortex-A53, Cortex-A55, Cortex-A72, Cortex-A73, Cortex-A75, Cortex-A77, Cortex-A78

o RISC-V

o Renesas RX

o AMD MicroBlaze

o Infineon TriCore

• Support for popular tools IAR, Eclipse/GCC, Arm DS, & Arm Keil

• Full Source Provided with License

Fast And Deterministic

PX5 RTOS is extremely fast and efficient. On typical 32-bit microcontrollers running at 80MHz, most API calls and context switches complete in less than one microsecond. It's also deterministic RTOS: The processing for each API and context switch is completely predictable and not a function of the number of active threads. For example, the processing required to obtain a semaphore is the same whether two or 100 threads are active.

One Of The Smallest RTOS

This is one of the smallest embedded RTOSes, requiring less than 1KB of flash memory and 1KB of RAM on typical 32-bit microcontrollers. Implemented with loosely coupled C functions, RTOS size scales automatically based on the application's use. The linker does not bring APIs and associated functions into the image unless they are used.

sgs tuv saar pre-certifies

SAFETY-CERTIFIED RTOS

SGS-TUV Saar pre-certifies that PX5 RTOS complies with IEC-61508 SIL 4 (electronic), IEC 62304 Class C (medical), ISO 26262 ASIL D (automotive), and EN 50128 (rail) functional safety standards. PX5 RTOS is suitable for developing safety-critical software to the highest integrity levels (SIL 4).

SIMPLE - TWO MAIN SOURCE FILES

The RTOS is composed of two main source files: px5.c and px5_binding.s. Drop these RTOS files into any C main project example, and PX5 is ready to run. No complicated projects and/or linker control file changes.

Using PX5 in an application is also easy: Simply include POSIX pthread.h and add a call to px5_pthread_start to your C main function, as follows:

#include <pthread.h>
int main()
{
/* Start PX5. */
px5_pthread_start(1, NULL, 0);
/* Once px5_pthread_start returns, the C main function has been elevated to a thread - the first thread in your system! */
while(1)
{
/* PX5 RTOS API calls are all available at this point. For this example, simply sleep for 1 second. */
sleep(1);
}
}

PX5 RTOS is easy to install and use, taking only a few minutes. Use the processor-to-tool binding layer examples as a starting point.
- This Linux RTOS-compatible API reduces the learning curve for Linux developers new to embedded RTOS.
- POSIX-compatibility enables code sharing between devices that run embedded Linux.

Advanced Technology

- Data encapsulation technology assists compilers in generating the smallest, fastest code and reduces namespace collision with the application.
- Pointer/Data Verification (PDV) technology, a next-generation embedded RTOS technology, enables unprecedented verification of run-time function pointers, linked lists, and stacks.
- Central error handling - with optional user enhancement - helps facilitate building more robust applications.

Full Source Code

- You receive complete source code, including the RTOS binding layer source.
- The RTOS source code is designed to be easily understood.
- The RTOS source code is rigorously tested: complete C statement and branch decision coverage testing for every release.
- Discover the highest quality RTOS source on the market.

Portable RTOS

PX5 RTOS is written in ANSI C, making it highly portable to any processor architecture with C compiler support because 99% of the RTOS is written in ANSI C. It supports popular embedded MCU and MPU architectures, including ARM-Cortex-M, Cortex-R, Cortex-A, MicroBlaze, Renesas RX, RISC-V, TriCore architecture families.

IAR, ARM & GCC Tool Support

As with its processor support, the PX5 RTOS supports the most popular embedded development tools, including those from IAR, ARM, and GCC.
PX5 RTOS also provides a meaningful subset of C+ +17 multithreading support that is portable across all C++ development tools.

Royalty-Free RTOS

PX5 offers royalty-free licensing for the PX5 RTOS. Like the product itself, the PX5 RTOS licensing is simple and easy to work with.

Professional Tech Support

Always ready to help, the embedded RTOS experts on the PX5 support team promise quick action on every request. Unlike many open-source and some commercial RTOSes, RTOS support is available when you need it.