Ashling’s Opella-XD is a powerful JTAG debug probe for embedded development on Arm RISC cores.

Opella-XD works with Ashling’s RiscFree debugger and with other third-party debuggers, open-source GDB based debuggers and Eclipse CDT.

Opella-XD Arm Features

  • Powered by USB interface; no external power-supply required
  • Up to 3MB/s download speeds making Opella-XD particularly suitable for large, complex projects
  • JTAG, cJTAG, SWD target connection
  • Fine-grained adjustment of JTAG clock frequency from 1KHz to 100MHz. Arm RTCK support
  • Multi-core support with full JTAG scan-chain configurability
  • Heterogeneous multi-core debug support for devices combining Arm with other processor architectures
  • Arm AARCH64, AARCH32, THUMB, THUMB, THUMB2 & THUMBEE instruction-set debugging
  • Support for all on-chip hardware breakpoints; unlimited number of software breakpoints
  • Detects and automatically configures for the appropriate target voltage from 0.9V to 3.6V
  • Fast in-target Flash Programming
  • Supplied with 20-pin 0.1” Target cable. Optional 10-pin 0.05” adapter
  • Operates on Windows and Linux hosts
  • Semi-hosting support (allows stdio calls between your target hardware and your host PC)
  • Configurable Target-Reset and Test-Port-Reset, under full user control
  • Hot-plug support; allows connection to a running target without resetting or halting
  • Built-in diagnostics instantly show status of Target, Debug Probe and USB link
  • Universal Hardware-Debug platform for all popular target architectures and compilers

Supported architectures:

  • Cortex-A™, Cortex-R™ and Cortex-M™ based devices including heterogeneous multicore debug

Order Codes

ProductOrder Code
Opella-XD for Arm Debug ProbeOpella-XD-Arm
Arm 20-way 0.1” IDC EmbeddedICE debug cableTPAOP-ARM20
Arm 10-way 0.05” Adapter (used with TPAOP-ARM20)ADOP-ARM10
RiscFree IDE for Arm DevelopmentRiscFree-Arm